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ee:hydrophones:start [2018/01/24 20:12] Ryan Summers |
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| ==== Software Design ==== | ==== Software Design ==== | ||
| + | **Note that for ease of use, the HydroZynq is programmed bare-metal. There is no operating system on the board!** | ||
| + | |||
| The software design is straightforward, but the most complex of the other systems. Communication with other computers is implemented using UDP sockets provided by the lwIP (lightweight IP) library. When the CPU first boots, it loads the program off the SD card into memory. It then programs the FPGA bit stream and begins program execution after initializing most peripherals (e.g. Xilinx Ethernet). The application then initializes peripherals that were instantiated in the FPGA fabric (such as the ADC reader, the system monitor, and the SPI engine). It then configures the ADC chip and binds/connects to a variety of UDP ports for communication. | The software design is straightforward, but the most complex of the other systems. Communication with other computers is implemented using UDP sockets provided by the lwIP (lightweight IP) library. When the CPU first boots, it loads the program off the SD card into memory. It then programs the FPGA bit stream and begins program execution after initializing most peripherals (e.g. Xilinx Ethernet). The application then initializes peripherals that were instantiated in the FPGA fabric (such as the ADC reader, the system monitor, and the SPI engine). It then configures the ADC chip and binds/connects to a variety of UDP ports for communication. | ||
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| - | === Code === | + | ==== Code ==== |
| All software and firmware is available in [[https://github.com/PalouseRobosub/hydro-zynq|the GitHub repository]]. There are two primary directories: hardware and software. The hardware folder contains all the Verilog and TCL files for interracting with Vivado. TCL scripts have been generated to rebuild the block design in vivado, and a README.txt file in proj/ describes how to use them. Additionally, the IO constraints file is provided for the current hardware. | All software and firmware is available in [[https://github.com/PalouseRobosub/hydro-zynq|the GitHub repository]]. There are two primary directories: hardware and software. The hardware folder contains all the Verilog and TCL files for interracting with Vivado. TCL scripts have been generated to rebuild the block design in vivado, and a README.txt file in proj/ describes how to use them. Additionally, the IO constraints file is provided for the current hardware. | ||
| Line 77: | Line 79: | ||
| **The current firmware utilizes software/bit/adc_dma_revb.bit as the bitstream file.** | **The current firmware utilizes software/bit/adc_dma_revb.bit as the bitstream file.** | ||
| - | === Programming & Debugging === | + | ==== Programming & Debugging ==== |
| Programming and debugging can be completed through creation of new BOOT.bin files on the SD card, but this is often extremely inefficient. The [[https://store.digilentinc.com/jtag-hs3-programming-cable/|Digilent HS3]] can be used as a JTAG access point for GDB debug interfaces. To interact with the HydroZynq through JTAG, use the `xmd` command (provided by Xilinx). | Programming and debugging can be completed through creation of new BOOT.bin files on the SD card, but this is often extremely inefficient. The [[https://store.digilentinc.com/jtag-hs3-programming-cable/|Digilent HS3]] can be used as a JTAG access point for GDB debug interfaces. To interact with the HydroZynq through JTAG, use the `xmd` command (provided by Xilinx). | ||
| After executing xmd from the command line, you will enter a shell-like environment. To connect to the ARM core for programming, enter: | After executing xmd from the command line, you will enter a shell-like environment. To connect to the ARM core for programming, enter: | ||
| - | > connect_arm_hw | + | > connect arm hw |
| | | ||
| Once connected, if you desired to program the FPGA or the ARM, first stop the ARM CPU. | Once connected, if you desired to program the FPGA or the ARM, first stop the ARM CPU. | ||
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| | | ||
| Once XMD has been started, a remote GDB server is automatically instantiated. To connect to the GDB server, simply use the debug.sh script located in `software/` to launch up a GDB session. | Once XMD has been started, a remote GDB server is automatically instantiated. To connect to the GDB server, simply use the debug.sh script located in `software/` to launch up a GDB session. | ||
| - | ./debug.sh | + | [hydrozynq-repo-path]/software/debug.sh |
| - | === Communicating === | + | |
| + | | ||
| + | ==== Communication ==== | ||
| + | The HydroZynq communicates primarily through UDP. A number of user scripts have been created in the `scripts/` folder for ease of use with UDP. For example, the stdout of the application is sent to Cobalt's UDP port 3000 (e.g. 192.168.0.2:3000). A simple python application ([hydrozynq-repo-path]/scripts.debug_stream.py) can be used to view the standard output of the application (e.g. dbprintf() statements). | ||
| + | === Port Descriptions === | ||
| + | ^ Port Number ^ Destination ^ Description ^ | ||
| + | | 3000 | HydroZynq | Command port | | ||
| + | | 3001 | Cobalt | Sample data stream port | | ||
| + | | 3002 | Cobalt | Time of Arrival Delay result port | | ||
| + | | 3003 | Cobalt | Cross-correlation stream port | | ||
| + | | 3004 | Cobalt | Debug/STDOUT port | | ||
| + | |||
| + | Note that the HydroZynq does not run ROS natively, so python scripts running on cobalt are necessary for interfacing the HydroZynq with ROS. As of now, these scripts are still under initial development. | ||
| + | |||
| + | The HydroZynq currently sends out all data used in the cross-correlation and the results of the final cross-correlation. These can be visualized using python and MatPlotLib through the scripts made available: | ||
| + | python [hydrozynq-repo-path]/scripts/data_receiver.py | ||
| + | |||
| + | python [hydrozynq-repo-path]/scripts/correlation_receiver.py | ||
| + | | ||
| + | The data and correlation results are sent using a trivial packet format: | ||
| + | <packet_number as unsigned, little-endian 4-byte integer> <Sample 1> ... <Sample N> | ||
| + | |||
| + | Data results contain 4 channels per Sample, where each channel is a 16-bit unsigned integer (little-endian) value. (E.g. each sample is 64 bits and has 4 values). | ||
| + | |||
| + | Correlation results contain 3 channels per Sample, where each channel is a 4-byte integer (little-endian) value. The first sample is the correlation between Channel 1 and reference, teh second is between Channel 2 and reference, and the last is between Channel 3 and reference. | ||
| + | |||
| + | The HydroZynq allows for a number of run-time parameters to be set dynamically, including the ping detection threshold. These can be sent to the HydroZynq command port in a simple ASCII string. | ||
| + | [keyword]:[value],[keyword]:[value],.... (etc) | ||
| + | | ||
| + | Note that the string must terminate without a trailing comma and that it is able to only have a single key-value pair. The current supported keys are as follows: | ||
| + | ^ Key String ^ Data Type ^ Description ^ | ||
| + | | reset | N/A | Causes the Zynq to perform a software reset. | | ||
| + | | threshold | unsigned int | Sets the HydroZynq ping ADC threshold value. | | ||
