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ee:hydrophones:start [2018/01/28 15:46]
Ryan Summers [Software Design]
ee:hydrophones:start [2018/01/28 16:06]
Ryan Summers [Analog Design]
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 ==== Analog Design ==== ==== Analog Design ====
 +{{ :​ee:​hydrophones:​analog-hydrozynq.jpg |}}
 +
 The analog signal goes through a five-stage amplification and filtering process. First, the signal is sent through two gain stages, each of which apply an adjustable gain to the signal. After the signal is gained into a reasonable voltage range, it is passed through a low-pass filter and then a high-pass filter to result in a bandpass filter of the signal. The analog signal goes through a five-stage amplification and filtering process. First, the signal is sent through two gain stages, each of which apply an adjustable gain to the signal. After the signal is gained into a reasonable voltage range, it is passed through a low-pass filter and then a high-pass filter to result in a bandpass filter of the signal.
  
-Once the signal has been filtered and gained, it is preprocessed for the ADC. In order to acquire more accurate measurements,​ the ADC requires signals to be differential. The analog signals are therefore put through a signle-ended to differential converter. Immediately before the signals enter the ADC, there is a low-pass anti-aliasing filtering. This filter guarantees Niquist criteria, which means that any frequencies detected in the sampled signal will not be aliases of higher frequencies.+Once the signal has been filtered and gained, it is preprocessed for the ADC. In order to acquire more accurate measurements,​ the ADC requires signals to be differential. The analog signals are therefore put through a single-ended to differential converter. Immediately before the signals enter the ADC, there is a low-pass anti-aliasing filtering ​(Low-pass differential RC).
  
  
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 ==== Software Design ==== ==== Software Design ====
-//​Note ​that for ease of use, the HydroZynq is programmed bare-metal. There is no operating system on the board!//+//Note: For simplicity, the HydroZynq is programmed bare-metal. There is no operating system on the board!//
  
 The software design is straightforward,​ but the most complex of the other systems. Communication with other computers is implemented using UDP sockets provided by the lwIP (lightweight IP) library. When the CPU first boots, it loads the program off the SD card into memory. It then programs the FPGA bit stream and begins program execution after initializing most peripherals (e.g. Xilinx Ethernet). The application then initializes peripherals that were instantiated in the FPGA fabric (such as the ADC reader, the system monitor, and the SPI engine). It then configures the ADC chip and binds/​connects to a variety of UDP ports for communication. ​ The software design is straightforward,​ but the most complex of the other systems. Communication with other computers is implemented using UDP sockets provided by the lwIP (lightweight IP) library. When the CPU first boots, it loads the program off the SD card into memory. It then programs the FPGA bit stream and begins program execution after initializing most peripherals (e.g. Xilinx Ethernet). The application then initializes peripherals that were instantiated in the FPGA fabric (such as the ADC reader, the system monitor, and the SPI engine). It then configures the ADC chip and binds/​connects to a variety of UDP ports for communication. ​